Digital data is often stored to and retrieved from memory. Typically, memory is manufactured using chips of silicon. Semiconductor materials etched onto the silicon allow many transistors to be implemented in a chip to produce high density memories. The transistors can be configured to form NAND gates, inverters, and other functions used to implement the memory.
Storing two or more bits in a memory cell increases the density of data that can be stored in the memory cell. The access and write times of a cell of data, however, may become non-uniform. For example, in the case of 2 bits/cell with 11, 10, 00, 01 represented by the 4 states of the memory cell respectively, the most significant bit (MSB) of a memory cell may be accessed faster than the least significant bit (LSB). This is because only one compare is needed to determine if the MSB is above a middle threshold value. A second compare is needed to determine if the LSB is above a lower threshold (when the MSB is below the middle threshold) or above a higher threshold (when the MSB is higher than the middle threshold).
Flash memory is often designed with a line (a.k.a. wordline) structure where all the cells connected to the wordline are accessed (read and program) at the same time. In the case of Multiple Level Cell (MLC) memory cells, the MSB bits of all the cells in the wordline form a first data page and the LSB bits form a second data page. The two data pages will have different access times because the MSBs and the LSBs have different access times. The access time for a particular memory access thus becomes a variable when there is more than one possible access time. It may be unacceptable in some applications to have a variable memory access time. A better way to access memory may be desirable.